
ADP5585 Data Sheet
Rev. C | Page 16 of 40
Figure 26 shows a typical multibyte read sequence for reading
internal registers. The cycle begins with a start condition, followed
by the 7-bit device address (0x34 for all models except the
ADP5585ACPZ-03-R7, 0x30 for the ADP5585ACPZ-03-R7
only), followed by the R/
W
bit set to 0 for a write cycle. The
ADP5585 acknowledges the address byte by pulling the data
line low. The address of the register from which data is to be read
is sent next. The ADP5585 acknowledges the register pointer byte
by pulling the data line low. A start condition is repeated, followed
by the 7-bit device address (0x34 for all models except the
ADP5585ACPZ-03-R7, 0x30 for the ADP5585ACPZ-03-R7
only), followed by the R/
W
bit set to 1 for a read cycle. The
ADP5585 acknowledges the address byte by pulling the data
line low. The 8-bit data is then read. The address pointer is then
incremented to read the next data byte, and the host continues to
pull the data line low for each byte (master acknowledge) until
the n data byte is read. The host pulls the data line high (no
acknowledge) after the last byte is read, and a stop condition
completes the sequence.
START
0 = WRITE
7-BIT DEVICE ADDRESS 7-BIT DEVICE ADDRESS
ADP5585 ACK
8-BIT REGISTER POINTER READ BYTE 1 READ BYTE 2 READ BYTE n00 0 10 0 0 0 1
REPE
T
T
RT 1 = REA
ADP5585 ACK ADP5585 ACK MASTER ACK MASTER ACK MASTER ACK
NO ACK
STOP
09841-025
Figure 26. I
2
C Multibyte Read Sequence
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